JTAG CPLD Programmer Having built the GW6BWX Low cost test card generator I needed to be able to program the CPLD. After looking around the Lattice web site and around the web for a couple of hours I came across a web page with a small JTAG programmer on a double sided board. Programmable Logic Device - PLD - and CUPL Kanda PLD trainer includes everything needed to learn about PLDs and CUPL descripion language, test board for trying designs and a universal programmer that can also program memory chips and microcontrollers as well as PLD. ATF15xx CPLD programmers and development kits are also in stock. ATF15xx CPLD Development/Programmer Kit. ATF15XX-DK3-U Complex Programmable Logic Device (CPLD) Development/Programmer Kit. Microchip Technology. The ATF15xx-DK3.

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• Apr 06, 2014  The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. (March 2018: Link dead.
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The guys over at hackshed have been busy. [Carl] is making programmable logic design easy with an 8 part CPLD tutorial. (March 2018: Link dead. Try the Wayback Machine.) Programmable logic devices are one of the most versatile hardware building blocks available to hackers. They also can have a steep learning curve. Cheap Field Programmable Gate Arrays (FPGA) are plentiful, but can have intricate power requirements. Most modern programmable logic designs are created in a Hardware Description Language (HDL) such as VHDL or Verilog. Now you’ve got a new type of device, a new language, an entirely new programming paradigm, and a complex IDE to learn all at once. It’s no wonder FPGAs have sent more than one beginner running for the hills.

The tutorial cuts the learning curve down in several ways. [Carl] is using Complex Programmable Logic Devices (CPLD). At the 40,000 foot level, CPLDs and FPGAs do the same thing – they act as re-configurable logic. FPGAs generally do not store their configuration – it has to be loaded from an external FLASH, EEPROM, or connected processor. CPLDs do store their configuration, so they’re ready as soon as they power up. As a general rule, FPGAs contain more configurable logic than CPLDs. This allows for larger designs to be instantiated with FPGAs. Don’t knock CPLDs though. CPLDs have plenty of room for big designs, like generating VGA signals.

[Carl] also is designing with schematic capture in his tutorial. With the schematic capture method, digital logic schematics are drawn just as they would be in Eagle or KiCad. This is generally considered an “old school” method of design capture. A few lines of VHDL or Verilog code can replace some rather complex schematics. [Carl’s] simple designs don’t need that sort of power though. Going the schematic capture route eliminates the need to learn VHDL or Verilog.

[Carl’s] tutorial starts with installing Altera’s Quartus II software. He then takes the student through the “hardware hello world” – blinking an LED. By the time the tutorial is done, the user will learn how to create a 4 bit adder and a 4 bit subtractor. With all that under your belt, you’re ready to jump into big designs – like building a retrocomputer.

[Image via Wikimedia Commons]

The project will feature a XC9536XL CPLD from Xilinx.

A CPLD is basically a simpler version of an FPGA - both are microchips.

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But what is a CPLD or FPGA for that matter and what makes them different from other microchips (as for example the ATmegas and ATtinys from Atmel used in Arduino boards etc.)?

CPLDs and FPGAs basically have 'programmable internal wiring'. That is the chip can be reconfigured via software / programming to do (almost) any task you want it to do.

And how is that different to simply programming an Arduino?

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The part that is different is that the reprogramming / reconfiguring happens on the hardware level, not on the software level. So programming happens 'much closer to metal' than 'ordinary programming' (very vaguely like programming a chip in Assembler in terms of 'close to metal-ness').

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In other words, programming it does not only mean telling the chip what to do (do A, then B, then C) but it also means telling it how each little part inside is connected with each other part and how these parts work togetherand at what timings. Timings can be defined down to a few nanoseconds accuracy depending on the chip. With other µCs you ideally have single-cycle execution commands (like with the µCs from Atmel - PICs from Microchip are more difficult here) and factor in the clock speed to take the guesswork out of program timing. And you have to progam them in Assembler which is much too time consuming and complex for most tasks.

A CPLD's / FPGA's highly precise timing allows them to do stuff like producing the video output for a LCD panel or video output in general and their computing power and speed is used in (real-time) signal analysis and processing tasks, image analysis tasks (for example in robotics: object detection, face detection etc.) and also in cryptography (some projects use them as cheap 'supercomputers' to break weaker encryptions).

They have two other significant advantages that make them different by design:

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a) different parts of the chip can be assigned different tasks and these tasks can run in parallel! That means where a 'normal' microchip would do task A then B then C one after the other, a CPLD/FPGA would do them concurrently (vaguely similar to a GPU compared to a CPU) and be done in literally a third of the time. The only limit to the amount of tasks is the amount of 'logic gates' or 'logic units' the chip offers (more logic units => higher price) and the (computational) complexity of the tasks involved.

b) they consume relatively little power for the amount of work they can do, provided it is work that can be done in parallel.

As for my choice of device: why a CPLD and not a FPGA?

CPLDs offer less computational resources than FPGAs (from 5-100x) but they also are cheaper in general, not by a large margin though. The cheapest CPLDs can be had for 2-5$ (most in the 2-50$ range), the cheapest FPGAs start at about 5-10$ (up to several hundred dollars, depending on complexity).

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Another small advantage, a bit depending on the task: CPLDs have a quicker startup time since they have an internal non-volatile memory (i.e. its contents don't disappear on power off) for their configuration. FPGAs have to read their configuration from an external flash memory which can take a few seconds on startup.

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Since CPLDs are a bit simpler by design as mentioned but are programmed in the same languages as FPGAs (VHDL and Verilog are the main ones - the former oftentimes used in Europe, the latter mainly in the US), they are a good starting point for getting into the world of reprogrammable or rather reconfigurable microchips (or so I hope). And last but not least, I did not find a good tutorial for a FPGA board ;)).